A physical verification engineer checks that a finished chip layout follows the foundry's design rules and matches the circuit it is meant to build, before the design is sent for manufacturing. The work sits near the end of the chip design flow, where one missed rule can mean an expensive redesign of the silicon.
In India, the role sits within VLSI and semiconductor design teams at chip design companies, design services firms and global capability centres of multinational chip firms. Most people reach it through an engineering degree in electronics, electrical or VLSI design, followed by hands-on training in layout and verification tools.
The job suits people who enjoy detailed, rule-based problem solving and can stay patient when a check fails for the hundredth time. Interest in India's semiconductor boom is growing, but the path needs solid electronics basics and a willingness to learn specialised tools on the job.
- Minimum Qualification
- Bachelor's degree in engineering (typically B.Tech/B.E.)
- Typical Degree
- B.Tech/B.E. in ECE, EEE or VLSI Design
- Expected Entry Salary
- To be confirmed by editorial team
- Entry-level to Senior
- To be confirmed by editorial team
- Job Demand Growth
- Rising with India's chip design and semiconductor push
- Work Hours
- Full-time; longer near chip tape-out deadlines
- Places of Work
- Chip design firms, design services, GCCs
